This invention relates to picture image processing apparatus for processing picture image information by using an electronic computer and more particularly a memory device for processing picture images wherein picture image informations are converted into digital quantities for writing into and reading out of the memory device.
A prior art picture image processing apparatus for digitally processing picture image information to display a picture image comprises a main memory unit in which picture image information are stored and read out by designating an address from outside, a refresh memory device which temporarily holds the read out picture information as a frame buffer, a shift register for transferring the picture image information stored in the frame buffer of the refresh memory device by utilizing horizontal and vertical synchronizing signals as reference pulses and a display device for displaying the picture image information transferred from the shift register for each picture element.
With such picture image display apparatus as described above, the picture image information are displayed by the display device as a group of a plurality of picture element information. For example, the picture image information for a frame are divided into 512 vertical picture elements and 512 horizontal picture element for display.
Such picture element information are generally represented by a plurality of bits. For example, where the picture element information are to be represented by white and black colors they are represented by 4 bits according to the screen brightness and tone of the picture. Where the picture image information are to be displayed by color, 8 bits are used for red, blue and green colors respectively for display, thus using a total of 24 bits. For this reason, usually the main memory unit corresponds to the number of picture elements which comprise the picture area of the display device. For example, where a picture area is constituted by a number of picture elements of 512 (vertical).times.512 (horizontal), the memory board is also constituted by bits of 512 (vertical).times.512 (horizontal). Generally, the memory board is constituted by a bit plane. Consequently, where one picture element information is constituted by four bits, it is necessary to use at least four memory boards whereas when it is constituted by 24 bits, it is necessary to use 24 memory boards.
The main memory unit made up of such memory boards has been designed to correspond to the number of picture elements of a picture area without any flexibility of the memory capacity. Actually, however, it is necessary to display various picture images by the same display device. Thus, picture image information other than 512.times.512 picture elements are necessary for different applications.
For example, there are picture image information constituted by picture elements of 256.times.256 or 1,024.times.1,024. In this case, however, with a fixed memory unit having 512.times.512 picture elements, it is impossible to display a picture image information constituted by 1,024.times.1,024 picture elements. Furthermore, even though the memory unit has a capacity of two picture areas it can store the picture image information of only one picture area where the picture image information comprises 256.times.256 picture elements. Such inconvenience is caused by the fact that the bit allocation cannot be done for the memory area of each memory boards bit by bit.
In a display device in which a picture image is displayed by using 525 scanning lines and at a rate of 60 frames per second, one picture is displayed in 1/30 second. Accordingly, in a color picture one picture element is scanned and displayed in 80 to 90 nano/seconds.
According to a prior art picture image processing device, there is a substantial difference between the time at which a picture image information is written into the refresh memory unit from the main memory unit and the time at which a picture element is displayed by the display device. Thus, the time for displaying one picture element on the display device is much shorter than the time of reading out a picture image information from the main memory unit. This is caused not only by the difference in the inherent access time of individual apparatus but also by the fact that the picture element information cannot be allocated into the memory unit in a optimum bit length but instead the information actually is allocated with a redundancy, e.g. a considerably surplus bits are assigned. For example, in a byte machine 8 bits are assigned to represent a 4 bit picture element information.
Among presently available picture image processing apparatus may be mentioned an apparatus in which a plurality of display devices and high speed picture image input/output devices are connected in parallel with the picture image processing apparatus and in which there is provided a picture image processing memory device capable of accessing at high speeds to separately filed picture image information, for example, Graphic Display System Modes RM-9100, 9200 and 9300 of Ramtek Corporation.
The picture image processing memory device of the picture image processing apparatus described above has a board construction. The memory device has 8 memory boards and each memory board having a memory capacity corresponding to 262,144 picture elements (512 vertical elements.times.512 horizontal elements). This picture image processing memory device is used as two refresh memory devices, an input buffer device, and an output buffer device.
In each of the prior art apparatus described above, the picture image information to be displayed on the display apparatus directly corresponds with a memory device for storing the picture image information for the size of the picture image and the quality thereof.
More particularly, where a picture area of a picture image display device comprises 512.times.512 picture elements, the picture image processing memory device comprises 4 memory boards each containing 512.times.512 bits in the vertical and horizontal directions where the tone levels of the picture element are constituted by 4 bits. Since this construction is determined at the initial stage of design of the picture image display device, when it is desired to connect a different type picture image display device, for example, containing 1,024.times.1,024 picture elements in one picture area, it is necessary to prepare different memory board corresponding thereto. In other words, the memory size of the memory board is fixed and lacks expandability and flexibility so that such memory board can not store the picture image information described above.